Logic Verification Engineer

Experience:4 - 8 Years

Location:Hyderabad / Secunderabad

Education:UG - B.Sc - Electronics,PG - M.Sc - Electronics

Industry Type:Semiconductors/ Electronics

Role:Design Engineer

Functional Area:Engineering Design, R&D

Posted Date:20 Jan

ob Description

Job duties include:

• Define and develop verification plans
• Propose design for verification and test
• Improve our current verification flow
• The verification will include logic verification for FPGA core, logic IP, and analog IP

• In this position you will make sure that both FPGA placement and route software generated bitstream and silicon meets the defined architecture specification and the user design works functionally on the device, both for pre-tape out and post silicon
• You will also be responsible for development of software tools used for the verification 

 

Desired Candidate Profile

Required Skills and Experience

• Minimum BS Degree.
• 4-7 years related work experience in CAD/CAE, Specman, or other related domain
• Hands on experience with verification and EDA tools in System Verilog, Verilog, VHDL, Simulator, JTAG and Perl/TCL/C/C++/JAVA programming required
• Experience in Open Verification Methodology
• Experience in HDL modeling and BFM are required
• Experience in ASIC design are recommended
• Circuit simulation experience using SPICE, HSIM or equivalent tools preferred
• Must have strong leadership, excellent communication skills and enjoy working in teams
• Must be able to travel to the US on short notice ocassionally. 

Contact Details

Company Name:Actel

 

Website:http://tinyurl.com/Actel-job-1527

 Executive Name:Jim Robertson

Address:

Actel

2061 Stierlin Court

Mountain View,,USA 94043

Telephone:1-650-3184200

Reference ID:1527

Posted in: Logic Verification Engineer